ds-126 rev e voltage controlled crystal oscillator technical data saronix S1300 / S1309 / st1300 / st1309 series 3.3v, lvcmos frequency range: actual size description a 3.3v, voltage controlled crystal oscil- lator with output logic levels compatible with lvcmos and lvttl logic fami- lies. the series is designed with excellent jitter characteristics which makes it ideal for use in telecom and datacom applica- tions. true smd dil versions for ir reflow are available, select option "s" in part number builder. see separate data sheet for smd package dimensions. 1.5 mhz to 28.6363 mhz frequency stability: 20, 25 or 50ppm over all conditions: operating temperature, voltage change, load change, calibration tolerance, shock and vibration, with v c = 1.65v applications & features ? phase-locked loop (pll) clock and data recovery, frequency transaltion, frequency synthesis apps in video, video compression, telephony, and lan/wan data communication 3.3 volt operations lvcmos / lvttl compatible 3.5ps max rms period jitter wide range of performance options: 50 to 100 ppm apr* 20 to 50 ppm frequency stability tri-state option true smd for ir reflow available output waveform t r t f cmos symmetry 80% v dd 50% v dd 20% v dd logic 0 logic 1 * apr = (vcxo pull relative to specified output frequency) ? (vcxo frequency stability) note: apr is inclusive of 10 years aging temperature range: operating: storage: 0 to +70c or -40 to +85c -55 to +125c supply voltage: recommended operating: 3.3v 10% supply current: output drive: symmetry: rise & fall times: logic 0: logic 1: load: jitter: 45/55% max @ 50% v dd 9ns max 20% to 80% v dd 10% v dd max 90% v dd min 30pf 3.5ps max rms period jitter pull characteristics: input impedance (pin 1): frequency response (-3db): pullability: control voltage: transfer function: linearity: center control voltage: 50k ? min 10 khz min 50, 70, 100ppm apr* min 0.3 to 3.0v frequency increases when control voltage increases 5 or 10% max 1.65v environmental: mil-std-883c, method 1014, condition c mil-std-883c, method 1014, condition a2 mil-std-883c, method 1011, condition a mil-std-883c, method 1004 gross leak test: fine leak test: thermal shock: moisture resistance: mil-std-883, method 2002, condition b mil-std-883, method 2003 mil-std-883, method 2004, condition b2 mil-std-883, method 2007, condition a mil-std-202, method 215 mil-std-202, method 210, conditions a, b or c ( i or j for gull wing) mechanical: shock: solderability: terminal strength: vibration: solvent resistance: resistance to soldering heat: 10ma typ, 15ma max saronix 141 jefferson drive menlo park, ca 94025 usa 650-470-7700 800-227-8974 fax 650-462-9894 aging @ 25c: 3ppm max per year, 10ppm max for 10 years
S1300 / S1309 / st1300 / st1309 series saronix voltage controlled crystal oscillator technical data 3.3v, lvcmos ds-126 rev e all specifications are subject to change without notice. stability tolerance aa = 20ppm, 0 to +70c a = 25ppm, 0 to +70c b = 50ppm, 0 to +70c e = 50ppm, -40 to +85c package details part numbering guide 5.08 .200 max .46.08 .018.003 0.91 .036 max 7.62.20 .300.008 7.62.20 .300.008 pin 5 output pin 8 v dd pin 1 control voltage pin 4 gnd case (v ss ) scale: none (dimensions in ) mm inches saronix denotes pin 1 half size package saronix vcxo denotes pin 1 pin 3 pin 1 pin 7 7.75 .305 pin 12 pin 14 15.24.13 .600.005 5.08 .200 max 6.350.51 0.250.02 3.94.25 .155.010 .46.08 .018.003 21.0 .825 max 0.91 .036 13.0 .510 max tri-state logic table (4) glass insulators pin 8 pin function: pin 8: output pin 12: n/c (optional) pin 14: +3.3 vdc (v dd ) pin 1: control voltage pin 3: tri-state control (optional) pin 7: gnd/case (v ss ) marking format ** includes date code, frequency & part number 13.0 .510 max 6.350.51 0.250.02 13.0 .510 max frequency (mhz) saronix blank = non tri-state t = tri-state (6 pins) supply voltage s t 130 9 a a a j - 19.4400 (t) lead/package types blank = thru-hole s = true smd adaptor for dil14 j = gull wing linearity a = 5% b = 10% pullability (minimum apr) ** a = 50 ppm m = 70 ppm b = 100 ppm, not available at all frequencies 130 = 3.3v pin 3(2) input logic 1 or nc logic 0 or gnd pin 8(5) output oscillation high impedance required input levels on pin 3(2): logic 1 = 0.7 v dd min logic 0 = 0.3 v dd max ma m power supply v m oscillator v dd out gnd pin 14(8) pin 8(5) pin 1(1) * pin 7(4) pin 3(2) test point optional tri-state control voltage note a: c l includes probe and fixture capacitance * items in brackets( ) represent half size model c l (note a) = 30pf test circuit max marking format ** includes date code, frequency & part number ** exact location of items may vary max 2.54 .100 pin 2 optional tri-state control saronix 141 jefferson drive ? menlo park, ca 94025 usa 650-470-7700 800-227-8974 fax 650-462-9894 package size 0 = full size 9 = 1/2 size ** apr = (vcxo pull relative to specified output frequency) ? (vcxo frequency stability) note: apr is inclusive of 10 years aging packing method (t) = tape & reel for smd versions, full reel increments only (200pcs) blank = bulk
true smd adaptor technical data saronix saronix 141 jefferson drive ? menlo park, ca 94025 usa 650-470-7700 800-227-8974 fax 650-462-9894
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